Memristive System¶
An electrical one-port model whose evolving internal state changes a multiplicative resistance or conductance response to current or voltage.
Core Idea¶
A memristive system, in the electrical one-port sense used here, is a model in which an applied current or voltage changes an internal state and that state helps determine the port's resistive response. Chua and Kang express the general pattern as a state law, ẋ = f(x, u, t), and a special output law, y = g(x, u, t)u. For a current-controlled one-port this becomes v = R(x, i, t)i; for a voltage-controlled one-port it becomes i = G(x, v, t)v. The multiplication by the applied signal distinguishes this model class from an arbitrary dynamical system that happens to have memory. The source assumes continuous functions and a unique state solution from an initial state; these are conditions of its mathematical model, not a guarantee about every physical component.[1]
The term does not make every such system an ideal memristor. A resistance determined by cumulative charge alone is a narrower special model; an additional operative temperature or gating state places a case in the generalized class without proving charge-only ideality. The charge-controlled special-case equation appears in the Di Ventra, Pershin, and Chua manuscript. The explicit ideal charge-only definition, and the warning that a pinched current–voltage loop is insufficient to establish it, are supported here by the inspected abstract of Pershin and Di Ventra's later paper. No claim about an ideal physical device follows from those texts alone.[1][2][3]
Chua’s earlier ideal circuit-element proposal relates accumulated charge to flux linkage. Its charge-controlled and flux-controlled forms name local response quantities, memristance and memductance, respectively. These narrower ideal forms are a model boundary inside the broader electrical discussion, not names for every generalized internal-state system or proof that any measured component realizes the ideal law.[4]
Structural Signature¶
Four roles have to work together in the bounded electrical model:
- Electrical port pair. Current and voltage identify the input and output of one resistive or conductive branch. Which variable controls the model changes the equation's orientation; it does not turn a charge–voltage capacitor or flux–current inductor into the same class.[1][2]
- Operative internal state. The state records relevant history and can change the later terminal response. A named state that never affects the readout would only pad an otherwise memoryless equation.[1]
- Excitation-driven state law. A current- or voltage-dependent differential equation says how that state evolves. The law is necessary even when the derivative is zero at an equilibrium instant; perpetual nonzero change is not the criterion.[1]
- Multiplicative port readout. State-dependent resistance or conductance multiplies the port excitation to produce terminal voltage or current. Within the stated continuous finite-response model, zero input gives zero output. A dynamic output with an unrelated additive term does not meet this special readout merely because its trace is hysteretic.[1]
The state's dimension gives the model its order. Explicit absence of time from the state and response functions gives a time-invariant subclass. Replacing R(x, i, t) with R(x), or G(x, v, t) with G(x), specializes the class further; neither simplification is an all-instance condition.[1]
What It Is Not¶
The model is not synonymous with a particular metal-oxide switch, a nonvolatile bit, or a neuromorphic weight. Those physical or application claims require their own original evidence and a role-by-role mapping to the electrical equations. The two complete cases used here are theoretical model classifications in one 1975 report, not two independent experimental validations.[1]
It is also not the whole Hodgkin–Huxley membrane circuit: Chua and Kang classify the potassium and sodium channel branches through their respective driving voltages, state variables, and conductance readouts. Nor are a memcapacitive system, defined with charge and voltage, or a meminductive system, defined with flux and current, resistive one-port aliases. Finally, a pinched current–voltage loop alone is not a test of whether resistance depends only on charge.[1][2][3]
Scope of Application¶
The report's thermistor example is a thermal-state electrical one-port. Its body temperature changes with dissipated electrical power and heat transfer, and its resistance depends on that temperature. This makes a complete current-controlled model example without assuming that a thermistor is an ideal charge-only memristor.[1]
The report also treats potassium and sodium branches of the Hodgkin–Huxley circuit as voltage-controlled memristive one-ports. Potassium gating uses one state, n; sodium gating uses two, m and h. These are two branches within one ionic-model setting, rather than two extra independent settings. Their classification does not turn the complete membrane circuit or the original biological measurements into evidence for a newly tested memristive device.[1]
These examples show how the same port/state/update/readout form can be applied in different electrical models. They do not license a list of physical switching substrates without inspecting those devices' own constitutive and state evidence.[1]
A later physical-device report by Strukov and colleagues proposes a moving-boundary model for a titanium-dioxide switch, presents simulations in its Figure 3(a–c), and shows in Figure 3(d) an experimental comparison plot attributed there to earlier work. The subsequent corrigendum changes affected Figure 2a and window-function material and states that the published simulations used the corrected formulas. This implementation literature is relevant to the broad original “Memristor” page, but it is not a third complete positive for the four-role model mapping established by the 1975 report, nor proof of charge-only ideality.[5][6]
The finite multiplicative readout used here has zero output at zero excitation under its stated assumptions. Valov and colleagues report redox cells with nanobattery-driven, nonzero-crossing current–voltage behavior and motivate an extended model with an electromotive-force contribution. Separate theoretical work also discusses non-finite response. Those usages lie beyond this bounded finite subclass; they are not silently admitted by a loop shape or excluded from every wider use of “memristor.”[7][8]
Clarity¶
A temperature-dependent resistor can be described as if its resistance were simply prescribed from outside. The thermistor example makes a different claim: current dissipates power, the body temperature evolves under a heat-balance law, and that evolving temperature changes the subsequent resistance. The distinction is between a time label attached to a resistor and an internal state driven by the port's history.[1]
The same distinction explains the ionic case. The potassium and sodium conductances are not merely given functions of clock time; their gating states follow voltage-driven equations and enter the channel readout. That is why an electrical branch can have a memory-sensitive response while still using an instantaneous conductance-times-voltage terminal equation.[1]
Manages Complexity¶
The model separates the part of a problem that updates history from the part that reads out a terminal signal. In the thermistor, the heat-balance equation handles temperature change while v = R(T)i handles the electrical port. In a channel branch, gating equations handle the state while a gating-dependent conductance multiplies the branch driving voltage. The separation gives a disciplined way to ask whether a proposed example has all four roles rather than inferring membership from a plotted loop.[1]
That economy has a cost. A one-port model omits whatever belongs to the surrounding circuit or material description. In particular, the channel model does not by itself describe the complete Hodgkin–Huxley membrane, and the abstract equations alone cannot certify that a named physical switch implements the required state law. The poorly extracted coefficients in the source's detailed example equations are not reconstructed here; the classification relies on the legible state/readout structure and the authors' explicit model statements.[1]
Abstract Reasoning¶
The defining equations permit useful deductions, but their hypotheses matter. The multiplicative readout entails the zero-output-at-zero-input relation within the stated mathematical assumptions. Chua and Kang's Property 1 gives a passivity criterion only with its resistance-sign and model restrictions; it is not an assertion that all generalized memristive systems are passive.[1]
Their Property 3 makes a time-invariant current-controlled model equivalent to a nonlinear resistor under DC operation when the state equation has a unique globally asymptotically stable equilibrium for each DC input. Their Property 6 gives a high-frequency linear-resistor limit for the specified time-invariant subclass under bounded-input bounded-state stability and periodic operation. Neither result is an unconditional law for every physical device, every waveform, or every loop.[1]
These qualifications also separate a model-class recognition question from an ideality test. A pinched current–voltage loop may be consistent with more than one kind of internal memory, so it cannot alone settle whether cumulative charge is the only state relevant to resistance. The inspected 2018 source supports this negative diagnostic point at abstract level; it is not used here as a detailed experimental result.[3]
Knowledge Transfer¶
To transfer the abstraction from a thermistor to a channel branch, first identify the electrical pair and control signal, then find the operative state, its excitation-driven law, and the multiplicative terminal readout. In the thermistor, body temperature and heat transfer fill the middle roles. In a channel, voltage-driven gating variables fill them. The transfer concerns the arrangement of roles, not a shared material mechanism or interchangeable numerical coefficients.[1]
This test also disciplines a proposed new case. A measured loop, a memory-storage use, or the label “memristor” gives a reason to inspect the equations and device evidence, not a replacement for that inspection. If the constitutive pair is charge–voltage or flux–current, the neighboring capacitive or inductive memory classes may be more apt. If the claim is specifically ideal charge-only memory, a separate ideality argument is needed.[2][3]
Examples¶
Canonical model: thermistor¶
Chua and Kang's Example 1 treats a thermistor as a first-order, time-invariant, current-controlled memristive one-port. Mapped back: R1 is the current/voltage port; R2 is body temperature T; R3 is the thermal balance relating dissipated electrical power, heat loss, and heat capacity to change in T; R4 is the temperature-dependent resistance multiplying current to give voltage. The ambient temperature is a parameter, not the operative body-temperature state. Equations (5)–(7) and the report's explicit classification support this complete mapping. It is a theoretical model treatment, not a new measured waveform or proof of charge-only ideality.[1]
Applied model classification: ionic channel branches¶
The same report's Example 2 classifies potassium and sodium branches of the Hodgkin–Huxley membrane model. Mapped back: R1 is a branch driving-voltage/current pair, not the whole membrane; R2 is potassium n or sodium m and h; R3 is the voltage-driven gating update; R4 is gating-dependent conductance multiplied by the branch driving voltage. Equations (8)–(9) yield first- and second-order voltage-controlled classifications. This is unlike the thermistor because the operative state and its dynamics are ionic gating rather than temperature and heat balance, yet it is still one source's model classification, not independent biological validation.[1]
Structural Tensions¶
T1: Ideal-model simplicity versus generalized state expressiveness. A charge-only resistance law names a narrower ideal subclass. It makes a compact restriction, but it cannot simply absorb an independently evolving thermal or gating state while remaining charge-only. A generalized model can express those states at the cost of no longer having the ideal subclass's defining restriction. Diagnostic: Does the terminal response require operative state beyond cumulative charge?[1][2][3]
T2: One-port tractability versus full-system fidelity. Isolating a potassium or sodium channel branch makes the port/state/readout structure identifiable. Treating the complete membrane as that one resistive port would suppress other circuit contributions, including the branch's reversal-source context. More complete system description and a single-branch abstraction answer different questions. Diagnostic: Which exact electrical branch and driving-voltage pair do the cited state and readout equations represent?[1]
T3: Easy visual recognition versus justified ideality. A pinched loop is a visible feature of the relevant current–voltage response, but a loop shared by systems with additional internal state cannot uniquely diagnose the charge-only ideal model. The tension is about evidential discrimination, not an empirical performance tradeoff. Diagnostic: What evidence rules out response-relevant state other than charge?[1][3]
Structural–Framed Character¶
This entry names a formal electrical model class, rather than a discovery that every material with memory has the same physical constitution. Its carrier is a one-port current/voltage relation coupled to an internal state and a constrained readout map. Recognition rests on those coupled equations: excitation updates an operative state, and the state helps set the multiplier that produces terminal response. The 1975 electrical-engineering report introduced this generalized modeling vocabulary and classified its thermistor and ionic examples with it. A plotted loop or a device label may motivate inspection, but neither replaces the four-role test.[1]
On the structural–framed spectrum, the relation is strongly structural within electrical modeling: the thermistor and isolated channel branches can exchange very different thermal and ionic mechanisms while preserving the same formal arrangement. Its terms are nevertheless domain-framed. “Port,” “current,” “voltage,” “resistance,” and “conductance” retain electrical meanings; borrowing them for any stateful process would not automatically recognize a memristive one-port. The vocabulary travels as a warranted classification only when the full electrical port/state/update/readout mapping travels with it. Otherwise “memory” is an imported analogy, not evidence that the same named abstraction was present all along.[1]
The definition itself carries little evaluative weight: satisfying the equations says what model class is being used, not whether a device is useful, reliable, passive, nonvolatile, or ideal. Those judgments require additional premises and evidence. The formulation's institutional origin is the Berkeley Electronics Research Laboratory report, a product of human electrical-engineering practice in which researchers choose a branch, state variables, and measurement or model boundaries. Its formal membership rule does not depend on that institution's authority or on a particular laboratory procedure. This separation matters especially when moving from source-classified models to physical realization: a measured component needs its own evidence that the operative variables and readout fit, and an ideal memristor needs the stronger charge-only restriction. A pinched loop is insufficient for the latter.[1][2][3]
Its character: a structural electrical one-port model class with domain-bound variable meanings and evidence boundaries. It can be recognized across the two unlike sourced electrical models through their common equations, while applying its vocabulary outside that proven electrical structure remains analogy or a future abstraction question—not a Prime status or physical-ideality conclusion established here.[1]
Structural Core vs. Domain Accent¶
The portable skeleton within the sourced electrical model class is the four-role coupling: a current/voltage one-port pair, operative state, excitation-driven update law, and state-dependent multiplicative resistive or conductive readout. This relation survives a change in state physics. In the thermistor, heat loss, heat capacity, and temperature-dependent resistance are a thermal domain accent. In the potassium and sodium branches, voltage-driven gating and channel conductance are ionic accents. These mechanisms explain their respective models but are not ingredients that every memristive one-port must share.[1]
The skeleton's demonstrated portability stops at the electrical-model boundary of these cases. A broader cross-domain state/update/readout structure remains a future-prime question requiring its own catalog-wide all-instance and ancestor review. This electrical entry has no assigned Prime parent, and generic memory alone is not the same mechanism. Voltage and current, a resistive/conductive terminal pair, and the special multiplicative output are constitutive to this named entry. Remove them and a different dynamical or memory-device model may remain, but the memristive electrical one-port identity is no longer proved.[1][2]
That is also why this entry does not clear the substrate-general Prime bar now. Its common formal pattern is useful across thermal and ionic electrical models, yet its variable meanings and inclusion test remain electrical. Charge-only ideality is a narrower condition; passivity, DC equivalence, and a high-frequency limit need additional premises. No one material substrate, nonvolatile retention, or perpetual state motion follows from the core. These are scope distinctions, not a negative verdict on any uninspected physical implementation.[1][2]
Instantiates / Related Primes¶
The state equations are representations of electrical behavior, and feedback language can help describe how an excitation changes a state that affects later output. These are conceptual comparisons, not approved typed edges. In particular, a feedback analogy alone does not show that every admitted one-port has the full catalog Prime Feedback signature, and a generic Representation label does not yet supply a proved all-instance strict parent. The reviewed current-catalog placement is a provisional unparented root with no typed edge; that catalog decision does not turn the electrical model into a Prime.[1]
The more immediate domain neighbors are the ideal charge-only memristor as a narrower model and memcapacitive and meminductive systems as different constitutive-pair classes. The latter share the wider idea of state-dependent memory elements but are not resistive one-port subtypes. Memristance and memductance name response quantities rather than the complete device or model. An ideal charge–flux element is narrower than the generalized class; a reported switch or extended response model needs its own constitutive check. These distinctions prevent a shared label from erasing the electrical model boundaries.[1][2][3]
Neighborhood in Abstraction Space¶
Memristive System sits in a sparse region of the domain-specific corpus (95th percentile for distinctiveness): few abstractions share its structure, so a faithful description tends to retrieve it precisely.
Family — Unclustered & Miscellaneous (2721 abstractions)
Nearest neighbors
- Controlled Invariant Subspace — 0.78
- Quantum Operation — 0.77
- DEVS — 0.77
- Network Synthesis — 0.77
- Lorenz System — 0.76
Computed from structural-signature embeddings · 2026-10-17
Not to Be Confused With¶
- Ideal memristor. A charge-only resistance law is a narrower model. The 2009 author manuscript directly gives the charge-controlled special-case equation; the 2018 abstract explicitly describes the ideal charge-only condition. Neither source makes every generalized memristive system ideal.[2][3]
- A pinched-loop diagnosis. The loop does not on its own distinguish charge-only memory from additional internal-state memory. The 2018 abstract warrants this negative point, not a completed physical existence or nonexistence verdict.[3]
- Memcapacitive and meminductive systems. Their charge–voltage and flux–current constitutive pairs belong to sibling memory-element classes, not to this electrical resistive one-port class.[2]
- The entire Hodgkin–Huxley membrane or an uninspected switching substrate. The cited 1975 classification concerns channel branches. A physical substrate or composite circuit needs its own evidence before it can serve as another complete example.[1]
References¶
[1] Leon O. Chua and Sung Mo Kang, “Memristive Devices and Systems,” University of California, Berkeley, Electronics Research Laboratory Memorandum ERL-M515, 15 April 1975, original report PDF, especially printed pp. 1–4 (definition and Examples 1–2), 5–6 (Property 1), 7–8 (Property 3), and 10–11 (Property 6). https://www2.eecs.berkeley.edu/Pubs/TechRpts/1975/Archive/ERL-m-515.pdf. registry ↩a ↩b ↩c ↩d ↩e ↩f ↩g ↩h ↩i ↩j ↩k ↩l ↩m ↩n ↩o ↩p ↩q ↩r ↩s ↩t ↩u ↩v ↩w ↩x ↩y ↩z ↩27 ↩28 ↩29 ↩30 ↩31 ↩32 ↩33 ↩34
[2] Massimiliano Di Ventra, Yuriy V. Pershin, and Leon O. Chua, “Circuit Elements with Memory: Memristors, Memcapacitors and Meminductors,” arXiv:0901.3682v1, 23 January 2009, inspected six-page author manuscript, especially PDF pp. 2, 3, and 5. https://diventra.physics.ucsd.edu/Memdevicespub.pdf. The paper's nearby TiO2 ideal-model assertion is not adopted as physical ideality evidence here. registry ↩a ↩b ↩c ↩d ↩e ↩f ↩g ↩h ↩i ↩j ↩k
[3] Yuriy V. Pershin and Massimiliano Di Ventra, “A Simple Test for Ideal Memristors,” arXiv:1806.07360v2, revised 26 September 2018, inspected abstract only. https://arxiv.org/abs/1806.07360v2. registry ↩a ↩b ↩c ↩d ↩e ↩f ↩g ↩h ↩i ↩j
[4] Leon O. Chua, “Memristor—The Missing Circuit Element,” IEEE Transactions on Circuit Theory 18(5):507–519 (1971). Original journal scan: https://ethw-images.s3.us-east-va.perf.cloud.ovh.us/ethw/b/bd/Memristor_chua_article.pdf. Inspected PDF indices 0/printed 507, 2/509, and 4/511 for the charge–flux element and charge-/flux-controlled response forms; no physical ideal-device realization is inferred. registry ↩
[5] Dmitri B. Strukov, Gregory S. Snider, Duncan R. Stewart, and R. Stanley Williams, “The missing memristor found,” Nature 453:80–83 (2008). Author-hosted journal PDF: https://www.ece.ucsb.edu/~strukov/papers/2008/Nature2008.pdf. Inspected PDF indices 0–2/printed 80–82, distinguishing the moving-boundary equations, Fig. 3(a–c) simulations, and Fig. 3(d) experimental comparison attributed to the paper's earlier ref. 21. Read affected material with the 2009 corrigendum; no all-instance ideality claim is adopted. registry ↩
[6] Dmitri B. Strukov and colleagues (2009). “Erratum, The missing memristor found.” Nature 459:1154. https://doi.org/10.1038/nature08166. The publisher HTML labels it Erratum; the original PDF prints Corrigendum. Corrects affected Fig. 2a right-hand resistance and a window-function formula; reports that published simulations used the corrected formulas. registry ↩
[7] I. Valov and colleagues, “Nanobatteries in redox-based resistive switches require extension of memristor theory,” Nature Communications 4:1771 (2013). https://www.nature.com/articles/ncomms2784. Abstract and Introduction inspected for the observed nonzero-crossing redox-cell behavior and proposed electromotive-force extension. registry ↩
[8] Massimiliano Di Ventra and Yuriy V. Pershin, “On the physical properties of memristive, memcapacitive, and meminductive systems,” arXiv:1302.7063 (2013). https://arxiv.org/abs/1302.7063. Author theory on response boundaries; no universal physical-device claim is inferred. registry ↩