Combining Deep Power-Down with Self-Refresh Mode

Electronics, W. (2021). Combining Deep Power-Down with Self-Refresh Mode.

Type

Web resource

Intellectual base

Web

Year

2021

Link

https://www.winbond.com/hq/support/online-learning/articles-item/combining-deep-power-down-with-self-refresh-mode.html

Cited from

psychology

Cited by

1 citation across 1 artifact.

Each citation links to the sentence it supports in the citing article.

Primes

• Maintenance Rehearsal
  • The diagnostic payoff: an engineer designing a low-power sleep mode reasons directly in the prime's terms — either keep the refresh loop running (self-refresh mode) at its energy cost, or consolidate the contents to non-volatile storage

    This sourceDescribes DRAM self-refresh as the low-power mode that keeps the refresh loop running with an internal counter, and the NVDIMM/save-to-nonvolatile path that lets contents be offloaded so the refresh loop can stop and the DRAM be powered down.

    Supported in partVerified against the work's full text

    The article covers DRAM self-refresh/PASR power saving and deep power-down data loss, but not saving DRAM contents to non-volatile storage.

    “Separately, the JEDEC standard specifies a Deep Power-Down (DPD) mode, in which the entire memory array shuts down. All internal voltage generators inside the device are stopped and all data are lost”

    Read by an automated reader; not a human review. How support was checked

Verification

Does it exist? Not checked yet. This entry carries no identifier to resolve. It was extracted from the citation as written in the article, normalized, and deduplicated against the rest of the registry.

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