Computer Organization and Design: The Hardware/Software Interface¶
Patterson, D. A., & Hennessy, J. L. (2017). Computer Organization and Design: The Hardware/Software Interface: The Hardware/Software Interface.
Cited by¶
2 citations across 2 artifacts.
Each citation links to the sentence it supports in the citing article.
Primes¶
- Interference and Contention
- CPU scheduling: Multiple processes competing for CPU cycles on a single core or across shared caches; contention causes context-switching overhead, cache misses, and reduced individual process throughput, as Patterson and Hennessy (2017) document in their treatment of shared-cache and memory-bus contention in multicore architectures.
This sourceMorgan Kaufmann. Develops the hardware-software interface contract — the instruction-set architecture as a published convention binding chip designers, compiler writers, and operating systems — that sustains forty years of binary compatibility as a worked case of convention-bound symbolic representation inside machines.
- CPU scheduling: Multiple processes competing for CPU cycles on a single core or across shared caches; contention causes context-switching overhead, cache misses, and reduced individual process throughput, as Patterson and Hennessy (2017) document in their treatment of shared-cache and memory-bus contention in multicore architectures.
- Symbolic Representation
- The convention-maintenance mechanism is Intel's published instruction-set architecture, the manufacturers who fabricate compatible chips, and the software ecosystem that depends on the encoding remaining stable, a discipline Patterson and Hennessy (2017) develop as the hardware-software interface contract that supports forty years of binary compatibility.
This sourceMorgan Kaufmann. Develops the hardware-software interface contract — the instruction-set architecture as a published convention binding chip designers, compiler writers, and operating systems — that sustains forty years of binary compatibility as a worked case of convention-bound symbolic representation inside machines.
- The convention-maintenance mechanism is Intel's published instruction-set architecture, the manufacturers who fabricate compatible chips, and the software ecosystem that depends on the encoding remaining stable, a discipline Patterson and Hennessy (2017) develop as the hardware-software interface contract that supports forty years of binary compatibility.
Verification¶
Does it exist? Not checked yet. This entry carries no identifier to resolve. It was extracted from the citation as written in the article, normalized, and deduplicated against the rest of the registry.
Does it back the claim? Not recorded. Neither this nor any other of the 2 citations of this work carries a recorded support check.
Support is checked per citation rather than per work — the same source can be cited soundly in one article and wrongly in another. Per-citation recording began recently, so a citation with no recorded check is a gap in the record rather than evidence it went unchecked.
See how references were verified.
Registry ID ref:3369a2980741 · see in the full table