x86-TSO: A Rigorous and Usable Programmer's Model for x86 Multiprocessors.¶
Sewell, P., Sarkar, S., Owens, S., Nardelli, F. Z., & Myreen, M. O. (2010). x86-TSO: A Rigorous and Usable Programmer's Model for x86 Multiprocessors. Communications of the ACM, 53(7), 89-97.
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Primes¶
- Consistency Model
- Organizations with multiple sites. Branch offices, factories, and field teams act on locally cached versions of corporate truth, and the chosen answer to "how stale may a local copy be, and must changes propagate before being acted on?" is a consistency model in all but name. Scientific publication and replication. Preprints, peer-reviewed versions, errata, and retractions form a system in which different readers see different current truths, and the norms about which version binds whom and how long propagation may take constitute an implicit consistency model for the scholarly record. Memory hardware. CPUs and GPUs publish memory models (x86-TSO, ARM relaxed, the Java memory model) specifying which orderings of reads and writes the hardware honours
This sourceFormalizes the x86 total-store-order memory model as the ordering contract programmers reason against.
- Organizations with multiple sites. Branch offices, factories, and field teams act on locally cached versions of corporate truth, and the chosen answer to "how stale may a local copy be, and must changes propagate before being acted on?" is a consistency model in all but name. Scientific publication and replication. Preprints, peer-reviewed versions, errata, and retractions form a system in which different readers see different current truths, and the norms about which version binds whom and how long propagation may take constitute an implicit consistency model for the scholarly record. Memory hardware. CPUs and GPUs publish memory models (x86-TSO, ARM relaxed, the Java memory model) specifying which orderings of reads and writes the hardware honours
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