x86-TSO: A Rigorous and Usable Programmer's Model for x86 Multiprocessors.¶
Sewell, P., Sarkar, S., Owens, S., Nardelli, F. Z., & Myreen, M. O. (2010). x86-TSO: A Rigorous and Usable Programmer's Model for x86 Multiprocessors. Communications of the ACM, 53(7), 89-97.
Cited by¶
1 citation across 1 artifact.
Each citation links to the sentence it supports in the citing article.
Primes¶
- Consistency Model
- Organizations with multiple sites. Branch offices, factories, and field teams act on locally cached versions of corporate truth, and the chosen answer to "how stale may a local copy be, and must changes propagate before being acted on?" is a consistency model in all but name. Scientific publication and replication. Preprints, peer-reviewed versions, errata, and retractions form a system in which different readers see different current truths, and the norms about which version binds whom and how long propagation may take constitute an implicit consistency model for the scholarly record. Memory hardware. CPUs and GPUs publish memory models (x86-TSO, ARM relaxed, the Java memory model) specifying which orderings of reads and writes the hardware honours
This sourceFormalizes the x86 total-store-order memory model as the ordering contract programmers reason against.
Supported in partVerified against the publisher's abstract
Abstract confirms x86 processors use relaxed memory models and presents a rigorous x86-TSO model; it says nothing of GPUs, ARM, or the Java memory model.
“Instead, they have relaxed memory models, varying in subtle ways between processor families, in which different hardware threads may have only loosely consistent views of a shared memory.”
- Organizations with multiple sites. Branch offices, factories, and field teams act on locally cached versions of corporate truth, and the chosen answer to "how stale may a local copy be, and must changes propagate before being acted on?" is a consistency model in all but name. Scientific publication and replication. Preprints, peer-reviewed versions, errata, and retractions form a system in which different readers see different current truths, and the norms about which version binds whom and how long propagation may take constitute an implicit consistency model for the scholarly record. Memory hardware. CPUs and GPUs publish memory models (x86-TSO, ARM relaxed, the Java memory model) specifying which orderings of reads and writes the hardware honours
Verification¶
Does it exist? Confirmed. This work's DOI resolves to a registered record, which fixes its identity. That is all it fixes.
Does it back the claim? Read against the text for 1 of 1 citation: 1 supported in part. Each verdict is shown under its citation below, with what in the work backs the sentence.
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Registry ID ref:696b0f99702c · see in the full table