Logic Synthesis and Verification Algorithms¶
Hachtel, G. D., & Somenzi, F. (1996). Logic Synthesis and Verification Algorithms. Kluwer Academic.
Cited by¶
1 citation across 1 artifact.
Each citation links to the sentence it supports in the citing article.
Primes¶
- Equivalence-Preserving Rewriting
- Hardware synthesis: equivalent-circuit rewrites under logical equivalence, scored by gate count, depth, or power.
This sourceStandard reference on logic synthesis: replacing sub-circuits with functionally (logically) equivalent but structurally simpler implementations, optimizing for area, delay, and power — equivalent-circuit rewriting under logical equivalence scored by a cost criterion.
- Hardware synthesis: equivalent-circuit rewrites under logical equivalence, scored by gate count, depth, or power.
Verification¶
This reference passed the adversarial substantiation pipeline: it was checked to exist and to support the claim it is attached to. See how references were verified.
Registry ID ref:721b5528a54f · see in the full table