A Rational Design Process

Parnas, D. L., & Clements, P. C. (1986). A Rational Design Process: How and Why to Fake It. IEEE Transactions on Software Engineering, 251-257.

Type

Journal article

Intellectual base

Primary research

Year

1986

Pages

251-257

DOI

10.1109/tse.1986.6312940

DOI registrant

Institute of Electrical and Electronics Engineers

Link

https://doi.org/10.1109/TSE.1986.6312940

Cited from

computer_science

Cited by

1 citation across 1 artifact.

Each citation links to the sentence it supports in the citing article.

Primes

• Explanatory Overlay Masking Structural Debt
  • Engineering documentation: README sprawl and tribal-knowledge wikis that compensate for architectural confusion; onboarding-document size is often inverse to architectural clarity.

    This sourceArgues that documentation should track and reveal the (idealized) design structure; sprawling documentation signals architectural confusion rather than substituting for it.

Verification

Does it exist? Confirmed. This work's DOI resolves to a registered record, which fixes its identity. That is all it fixes.

Does it back the claim? Not recorded. The single citation of this work carries no recorded support check.

Support is checked per citation rather than per work — the same source can be cited soundly in one article and wrongly in another. Per-citation recording began recently, so a citation with no recorded check is a gap in the record rather than evidence it went unchecked.

See how references were verified.

Registry ID ref:9ebfd568ca83 · see in the full table