Memory address

Use a fixed-width value within a declared address space to identify an addressable storage unit, with architecture and translation rules determining which physical location a load or store reaches.

Version

v2 · 2026-08-30 · History

Domain-specific #

2258

Origin domain

computer architecture

Subdomain

memory addressing and translation

Core Idea

A memory address is a machine-level reference value interpreted within a declared address space to select a storage location or minimum addressable unit for an instruction, device, or software access. An instruction or device presents an address value, architecture rules divide it into any required segment, page, index, and offset fields, translation and protection state resolve the reference, and the memory hierarchy routes the resulting access to the selected physical storage or reports a fault.

Its autonomous residual is the architecture-qualified locator value and its resolution to one addressable storage unit, including width, granularity, namespace, translation level, and access semantics, rather than a memory location itself, the contents of that location, or every higher-level reference.

Scope of Application

Memory address applies when the analyst can specify a machine-defined address space containing addressable storage units and a hardware-software resolution path from an address representation to a memory access and establish that a numeric or coded value is interpreted under one architecture and address-space context as the locator of an addressable storage unit, with its denotation determined by the current resolution and mapping rules. The entry describes architectural memory locators, not network, postal, file, or database addresses. Security implications are kept conceptual and do not supply exploitation guidance.

Clarity

A clear claim names the carrier, governing rule, assumptions, and recognition test. This matters because address can mean a numeric location, a pointer value, an effective-address expression, a virtual address, a physical bus value, or a whole address space, and bit width alone does not resolve those senses.

Manages Complexity

The abstraction compresses physical and virtual addresses, flat and segmented models, byte-, word-, bit-, character-, and digit-addressable machines, Harvard and unified spaces, capability and tagged addressing, and memory-mapped devices into a stable carrier, rule, invariant, and failure boundary. It makes comparison tractable while retaining the variables that control validity.

Abstract Reasoning

1. Type the carrier. Establish a machine-defined address space containing addressable storage units and a hardware-software resolution path from an address representation to a memory access and reject examples from a different problem. 2. Lock the rule. Express that a numeric or coded value is interpreted under one architecture and address-space context as the locator of an addressable storage unit, with its denotation determined by the current resolution and mapping rules independently of one notation or implementation.

Knowledge Transfer

Transfer within computer architecture is strong when new cases preserve the same carrier, mechanism, and diagnostic. The move from On a byte-addressed flat physical address space, successive integer addresses select successive bytes, while a multi-byte value occupies a range whose ordering is governed separately by endianness. to A process virtual address can be divided into virtual-page number and page offset, translated through current page tables and protection state, and combined with a physical frame to form the memory access. demonstrates that continuity.

Relationships to Other Abstractions

Current abstraction Memory address Domain-specific

Parents (1) — more general patterns this builds on

• Memory address is a kind of Indirection Prime

  The proposed strict upward parent is prime:indirection.

Hierarchy paths (3) — routes to 3 parentless roots

• Memory address → Indirection → Layering

Show alternative paths (2)

Neighborhood in Abstraction Space

Memory address sits in a moderately populated region (49^th percentile for distinctiveness): it has near-neighbors but no dense thicket of look-alikes.

Family — Memory Architecture & Parallel Computing (34 abstractions)

Nearest neighbors

• Address space — 0.91
• Virtual address space — 0.91
• Virtual memory — 0.91
• Flat memory model — 0.89
• Scratchpad memory — 0.89

Computed from structural-signature embeddings · 2026-09-08