Memory Systems¶
Jacob, B., Ng, S. W., & Wang, D. T. (2008). Memory Systems: Cache, DRAM, Disk. Morgan Kaufmann.
Cited by¶
1 citation across 1 artifact.
Each citation links to the sentence it supports in the citing article.
Primes¶
- Maintenance Rehearsal
- In hardware memory, dynamic cells leak charge and must be refreshed every few milliseconds or their contents are lost, with refresh circuitry reading and rewriting each row continuously.
This sourceExplains DRAM operation: capacitor cells leak charge and must be periodically refreshed (read-and-rewrite, e.g. every 64 ms) on a period shorter than the worst-case retention time or data is lost.
- In hardware memory, dynamic cells leak charge and must be refreshed every few milliseconds or their contents are lost, with refresh circuitry reading and rewriting each row continuously.
Verification¶
This reference passed the adversarial substantiation pipeline: it was checked to exist and to support the claim it is attached to. See how references were verified.
Registry ID ref:4294ba4b267a · see in the full table