Cache Inclusion Policy¶
A multilevel-cache policy that maintains an inclusive, exclusive, or unconstrained residency relation between cache levels through coordinated fill, movement, eviction, and invalidation actions.
Core Idea¶
Cache inclusion policy specifies and maintains the permitted residency relation between data blocks in two or more levels of a processor-cache hierarchy. Let \(A_I\) be the set of block addresses resident in an inner cache, closer to a processor, and \(A_O\) the set resident in an outer cache. An inclusive relation requires \(A_I \subseteq A_O\); a strictly exclusive relation requires \(A_I \cap A_O = \varnothing\); and a non-inclusive, non-exclusive (NINE) relation imposes neither invariant, so an address may occur in both levels or only one.
Scope of Application¶
The home scope is multilevel hardware caches: private L1/L2 caches under shared last-level caches, multilevel accelerator and GPU caches, and other on-chip memory hierarchies that move addressed blocks among cache levels. The policy may be defined pairwise—L1 relative to L2, L2 relative to L3—or over a whole tree of private caches beneath a shared outer level.
The abstraction also applies when tags and data take different policies. An architecture can use a non-inclusive data array while maintaining an inclusive directory of inner-cache tags.
Clarity¶
The fastest diagnostic uses two snapshots and one counterfactual:
- For every address in the inner cache, must a corresponding outer tag exist? If yes, the relation is inclusive. 2. May an address occupy both scoped data arrays at once? If no, the relation is exclusive. 3. If an outer line is evicted while an inner copy remains, must the inner copy be invalidated or relocated solely to preserve a membership rule?
Manages Complexity¶
The abstraction compresses a large event table into one invariant. Instead of separately memorizing what every fill, hit, miss, replacement, coherence probe, and eviction does, an architect asks what action restores or preserves the selected set relation.
For inclusion, this reasoning immediately explains why an outer eviction can require back-invalidation, why the outer structure can act as a presence filter, and why contention in an outer set can evict a useful inner line.
Abstract Reasoning¶
Inclusion-policy reasoning supports deduction from invariants before simulation.
Containment deduction. If \(A_I \subseteq A_O\) and an address misses in \(O\), it cannot be resident in \(I\), assuming the lookup and state are at a coherent protocol point. An outer tag lookup can therefore filter a probe of included inner caches.
Knowledge Transfer¶
The abstraction transfers literally across processor families and research cache designs. An engineer can use the same set-relation and transition test for a private L1 under L2, several private L2 caches under a shared L3, or a CPU/GPU hierarchy. The labels remain exact only when address residency and preservation actions retain the same meaning.
Design knowledge transfers as conditional rules:
Relationships to Other Abstractions¶
Current abstraction Cache Inclusion Policy Domain-specific
Parents (1) — more general patterns this builds on
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Cache Inclusion Policy presupposes Caching Prime
Caching is the minimal proposed parent.
Hierarchy paths (9) — routes to 7 parentless roots
- Cache Inclusion Policy → Caching → Locality Of Reference → Recurrence
- Cache Inclusion Policy → Caching → Optimization
- Cache Inclusion Policy → Caching → Locality Of Reference → Heavy-Tailed Distributions
- Cache Inclusion Policy → Caching → Reserve → Mobilization → Latent Realizable Capacity
- Cache Inclusion Policy → Caching → Locality Of Reference → Spatial Indexing → Search and Retrieval → Trade-offs → Constraint
- Cache Inclusion Policy → Caching → Reserve → Economy Of Force → Allocation → Scarcity → Constraint
- Cache Inclusion Policy → Caching → Locality Of Reference → Spatial Indexing → Search and Retrieval → Problem Space → Representation → Abstraction
- Cache Inclusion Policy → Caching → Locality Of Reference → Spatial Indexing → Search and Retrieval → Problem Space → State and State Transition → Phase Space
- Cache Inclusion Policy → Caching → Locality Of Reference → Spatial Indexing → Search and Retrieval → Problem Space → Problem Representation → Representation → Abstraction
Neighborhood in Abstraction Space¶
Cache Inclusion Policy sits in a sparse region of the domain-specific corpus (89th percentile for distinctiveness): few abstractions share its structure, so a faithful description tends to retrieve it precisely.
Family — Unclustered & Miscellaneous (1565 abstractions)
Nearest neighbors
- Cache hierarchy — 0.80
- Far Pointer — 0.80
- False sharing — 0.79
- Cache coherence — 0.79
- CPU cache — 0.78
Computed from structural-signature embeddings · 2026-09-08