False sharing¶

Diagnose performance loss when independent data accessed by different processors occupy one coherence block, so writes trigger invalidation, transfer, and reload traffic as though the data were logically shared.

Version: v1 · 2026-08-30 · History
Domain-specific #: 1822
Origin domain: computer science
Subdomain: cache coherence performance pathologies
Aliases: Cache-line false sharing, False cache-line sharing

Core Idea¶

False sharing is a performance pathology in a coherent shared-memory system where different processors or threads access logically independent data objects that reside in the same coherence block, and at least one access stream writes. The coherence mechanism tracks ownership and validity at block granularity, not field granularity, so a write to one object can invalidate or transfer the block containing another processor's object. The resulting communication resembles true sharing even though the program does not exchange the affected logical value.^[1]

A cache line is held in coherence states across cores. When core A writes its field, it requests exclusive ownership and invalidates copies elsewhere; when core B then accesses a distinct field in that line, the line may move or be refetched. Alternating writes produce cache-line ping-pong, coherence messages, stalls, and lost scalability. The pathology is a mismatch among data layout, access partition, scheduling, and coherence granularity. Padding, alignment, per-thread replication, or data reorganization can separate write-hot objects, but each remedy can enlarge the working set or reduce spatial locality.^[2]

True sharing occurs when processors communicate through the same logical object, whereas false sharing requires independent objects collocated in the coherence unit. Read-read access alone ordinarily does not produce invalidation ping-pong. Capacity misses, conflict misses, lock contention, memory bandwidth saturation, and NUMA placement can yield similar slowdowns and require separate evidence. A reported cache-line size is platform-specific, and padding by folklore rather than measurement can waste cache capacity or move the bottleneck. Performance counters and address-level traces support diagnosis but require architecture-specific interpretation.^[3]

Structural Signature¶

Coherence block. A cache line or other protocol unit is the smallest ownership and invalidation granularity.
Independent data objects. Distinct logical variables share physical placement without sharing program meaning.
Multiple processors. Separate cores or participants cache or request the common block.
Write stream. At least one participant modifies its object and changes coherence ownership.
Invalidation or transfer. The protocol moves or invalidates the whole block rather than the written field.
Reload demand. Another participant needs its independent object and reacquires the block.
Ping-pong traffic. Repeated ownership changes create avoidable messages, stalls, and bandwidth use.
Layout intervention. Alignment, padding, partitioning, or replication changes which objects share a block.

What It Is Not¶

Not true sharing. The threads need not read or write the same logical variable.
Not a data race. Synchronization correctness can hold while cache-line placement still destroys performance.
Not ordinary cache capacity pressure. The signature is coherence interaction over one shared block, not merely too little cache.
Not read-only sharing. Multiple readers can normally share a line without repeated write invalidations.
Not a universal 64-byte rule. Coherence granularity and adjacent-line behavior depend on the architecture.
Not proof from speedup after padding alone. Padding can change alignment, prefetching, capacity, and NUMA behavior as well.

Scope of Application¶

The abstraction is literal wherever practitioners can identify the same constitutive roles, apply the same boundary tests, and obtain the same kind of output. The following habitats are uses of False sharing itself, not metaphors based only on resemblance.

Shared counters. Separating per-thread updates that would otherwise occupy one line.
Queues and ring buffers. Keeping independently written producer and consumer indices off a common coherence block.
Parallel arrays. Reorganizing fields or chunks so ownership follows the access partition.
Runtime allocators. Aligning thread-local metadata and preventing adjacent allocations from colliding at line granularity.
Compiler transformations. Grouping data by accessing processor or splitting falsely shared fields.
Performance analysis. Using scaling curves and cache-to-cache transfer evidence to distinguish the pathology.

Clarity¶

A clear account of False sharing must preserve the recognition invariant stated in the Core Idea rather than rely on the title alone. Name the architecture, coherence unit, field addresses, access pattern, and thread placement. Demonstrate that contending accesses target different logical objects within the same block. Separate writes from reads and true sharing from false sharing. Use counters or traces appropriate to the processor rather than treating one event name as universal. Re-measure after layout changes and report working-set or locality costs. These declarations are not editorial extras: each changes what observations count, which transformations are licensed, and what conclusion can be drawn. A reader should be able to reconstruct the input, the operative rule, the output, and at least one defeater from the account without consulting an implementation or guessing an unstated convention.

Manages Complexity¶

False sharing manages complexity by replacing a diffuse field of observations or possible operations with a bounded role structure: coherence block supplies a cache line or other protocol unit is the smallest ownership and invalidation granularity.; independent data objects supplies distinct logical variables share physical placement without sharing program meaning.; multiple processors supplies separate cores or participants cache or request the common block.; write stream supplies at least one participant modifies its object and changes coherence ownership.; invalidation or transfer supplies the protocol moves or invalidates the whole block rather than the written field.. The compression is useful because it localizes disagreement. One can ask whether the input was properly formed, whether a constitutive relation held, whether an alternative explanation defeats the inference, or whether the output was overinterpreted. The same compression can mislead when its discarded detail is exactly what the decision requires. A reference-grade use therefore reports both the invariant retained and the information intentionally lost.

Abstract Reasoning¶

Confirm that the workload loses throughput or gains latency as relevant threads spread across cores.
Map hot memory accesses to virtual and physical fields with their byte offsets.
Group addresses by the actual coherence block size.
Identify lines written by one participant and accessed through a different field by another.
Inspect cache-to-cache, invalidation, ownership, and stall evidence where the platform exposes it.
Change layout or ownership while holding the algorithm and workload as constant as possible.
Compare benefit against larger footprint, reduced spatial locality, and remaining true contention.
Test the candidate interpretation against the nearest named confusable rather than accepting a shared surface feature.
State the conclusion at the same scope as the source conditions, and retain uncertainty or nonuniqueness where the construct does not remove it.

Knowledge Transfer¶

The strict upward abstraction is Interference And Contention. False Sharing instantiates Interference and Contention because independently useful updates are coupled through a shared hardware bottleneck and each participant's progress imposes avoidable service cost on the others. Within cache coherence performance pathologies, the full mechanism transfers literally when the same roles and boundary tests recur. Beyond that domain, only the parent-level skeleton should travel. Reusing the label False sharing after removing its constitutive vocabulary would hide a change of mechanism behind an analogy. The honest transfer rule is therefore two-stage: recognize the domain-specific pattern first, then lift only the parent relation that remains invariant under a substrate change.

Examples¶

Canonical¶

Two worker threads increment separate counters stored consecutively in one structure. Each counter is logically private, yet both fall in the same cache line. Core A's increment obtains exclusive ownership and invalidates core B's copy; core B's next increment reverses ownership. Throughput collapses as the line ping-pongs. Aligning each counter onto a distinct coherence line removes the transfers, while summing the counters later preserves the intended result.

Mapped back: input and conventions → constitutive role test → bounded output → explicit interpretation and defeater check.

Applied / In Practice¶

A profiler reports high cache-to-cache modified-line transfers around a queue. Address analysis shows the producer writes head while the consumer writes tail, and the two indices occupy one line. A revised layout separates the indices and repeats the benchmark under the same affinity and load. Transfers and stalls fall, but the team also checks that padding did not enlarge an array enough to create a different capacity problem. The diagnosis rests on the complete chain, not padding folklore.

Mapped back: field observation or problem → candidate recognition → confusable and limit checks → appropriately scoped conclusion.

Structural Tensions¶

T1: Spatial locality versus coherence isolation. Packing related fields improves locality until independent writers turn proximity into traffic. Diagnostic: Are fields consumed together by one core or modified independently by several?
T2: Compact layout versus scalable updates. Padding avoids ping-pong while increasing footprint and possible capacity misses. Diagnostic: Does the saved coherence cost exceed the added cache footprint?
T3: Logical independence versus physical coupling. The program's ownership model says private while the cache protocol sees one shared unit. Diagnostic: At which hardware grain does the independence disappear?
T4: Portable code versus architecture specificity. Alignment choices that help one processor may be wasteful or insufficient on another. Diagnostic: Which declared architecture assumptions justify the layout?
T5: Counter evidence versus causal diagnosis. Events reveal line transfers but may include true sharing and other traffic. Diagnostic: Can address-level evidence connect the event to independent fields?
T6: Autonomy versus Interference and Contention. The parent explains bottleneck competition; false sharing adds coherence granularity and accidental collocation. Diagnostic: Would the contention remain if the fields occupied distinct coherence blocks?

Structural–Framed Character¶

False sharing is structural-leaning: coherence ownership and address overlap are mechanical, while salience and remedies depend on architecture, workload, compiler layout, and measurement tooling. The five framing criteria point in a consistent direction. Evaluative weight is limited to whether the defining conditions are met, not whether the outcome is desirable. Human practice matters to the extent that experts choose conventions, instruments, or reporting thresholds, but those choices do not make every verdict arbitrary. Institutional history explains the name and standard use; it does not replace the recognition rule. The operative vocabulary travels within the home field and closely adjacent subfields, while transfer farther away requires translation to the parent prime. Thus recognition remains disciplined even where interpretation is defeasible.

Structural Core vs. Domain Accent¶

What is skeletal. False Sharing instantiates Interference and Contention because independently useful updates are coupled through a shared hardware bottleneck and each participant's progress imposes avoidable service cost on the others. This is the part that can be expressed without the candidate's specialist nouns.

What is domain-bound. The irreducible accent is coherent caches, one block containing independent objects, cross-core writes, invalidation, ownership transfer, reload, and data-layout repair. Remove those elements and the result is no longer False sharing; it is only the parent relation or a loose analogy.

Why this does not clear the prime bar. The name does not recur with unchanged diagnostics across three independent domains. What transfers is already represented by prime:interference_and_contention. The candidate remains autonomous because its in-domain recognition rule, failure modes, and consequences are stable, but its vocabulary and interventions do not float free of the home substrate.

False Sharing instantiates Interference and Contention because independently useful updates are coupled through a shared hardware bottleneck and each participant's progress imposes avoidable service cost on the others.

The prospective workspace queue contains one strict upward edge to prime:interference_and_contention. No live DAG mutation is authorized.

Relationships to Other Abstractions¶

Current abstraction False sharing Domain-specific

Parents (1) — more general patterns this builds on

False sharing is a kind of Interference and Contention Prime

False Sharing instantiates Interference and Contention because independently useful updates are coupled through a shared hardware bottleneck and each participant's progress imposes avoidable service cost on the others.

Hierarchy paths (3) — routes to 2 parentless roots

False sharing → Interference and Contention → Constraint

Show alternative paths (2)

Neighborhood in Abstraction Space¶

False sharing sits in a sparse region of the domain-specific corpus (92^nd percentile for distinctiveness): few abstractions share its structure, so a faithful description tends to retrieve it precisely.

Family — Unclustered & Miscellaneous (1565 abstractions)

Nearest neighbors

Cache coherence — 0.84
Cache Inclusion Policy — 0.79
Firefly (cache coherence protocol) — 0.79
CPU cache — 0.78
Cache hierarchy — 0.77

Computed from structural-signature embeddings · 2026-09-08

Not to Be Confused With¶

True sharing. Processors intentionally communicate through the same logical location.
Data race. Unsynchronized conflicting access affecting correctness rather than a coherence-granularity performance cost.
Cache conflict miss. Different blocks map to the same limited cache set rather than different fields sharing one block.
Memory bandwidth saturation. Aggregate transfer demand exhausts a path without requiring line ping-pong.
Lock contention. Threads wait for one synchronization object; its cache traffic can coexist with but is not identical to false sharing.
NUMA remote access. Latency arises from memory placement across nodes rather than field colocation within a coherence block.

References¶

[1] Bolosky, W. J., and Scott, M. L. (1993). False Sharing and Its Effect on Shared Memory Performance. Microsoft Research Technical Report MSR-TR-93-01. https://www.microsoft.com/en-us/research/publication/false-sharing-and-its-effect-on-shared-memory-performance/ registry ↩

[2] Torrellas, J., Lam, M. S., and Hennessy, J. L. (1994). 'False Sharing and Spatial Locality in Multiprocessor Caches.' IEEE Transactions on Computers 43(6), 651-663. https://doi.org/10.1109/12.286299 registry ↩

[3] Intel Corporation. (2024). Intel 64 and IA-32 Architectures Optimization Reference Manual, section on modified data and false sharing. https://www.intel.com/content/www/us/en/developer/articles/technical/intel64-and-ia32-architectures-optimization.html registry ↩